BS2 icon BS2e icon BS2sx icon BS2p icon BS2pe icon BS2px icon





Syntax: SHIFTIN Dpin, Cpin, Mode, [Variable {\Bits} {, Variable {\Bits}...}]


Shift data in from a synchronous serial device.

Quick Facts

  BS2, BS2e, and BS2pe BS2sx and BS2p BS2px
Timing of T0 and T1 14 µs / 46 µs 5.6 µs / 18 µs 3.6 µs / 11.8 µs
Transmission Rate ~ 16 kBits/Sec ~ 42 kBits/Sec ~ 65 kBits/Sec
Related Commands



SHIFTIN and SHIFTOUT provide an easy method of acquiring data from synchronous serial devices. Synchronous serial differs from asynchronous serial (like SERIN and SEROUT) in that the timing of data bits (on a data line) is specified in relationship to clock pulses (on a clock line). Data bits may be valid after the rising or falling edge of the clock line. This kind of serial protocol is commonly used by controller peripherals like ADCs, DACs, clocks, memory devices, etc.

At their heart, synchronous-serial devices are essentially shift-registers; trains of flip-flops that pass data bits along in a bucket brigade fashion to a single data output pin. Another bit is output each time the appropriate edge (rising or falling, depending on the device) appears on the clock line.

The SHIFTIN instruction first causes the clock pin to output low and the data pin to switch to input mode. Then, SHIFTIN either reads the data pin and generates a clock pulse (PRE mode) or generates a clock pulse then reads the data pin (POST mode). SHIFTIN continues to generate clock pulses and read the data pin for as many data bits as are required.

Making SHIFTIN work with a particular device is a matter of matching the mode and number of bits to that device's protocol. Most manufacturers use a timing diagram to illustrate the relationship of clock and data. Items to look for include: 1) which bit of the data arrives first; most significant bit (MSB) or least significant bit (LSB) and 2) is the first data bit ready before the first clock pulse (PRE) or after the first clock pulse (POST). The table below shows the values and symbols available for the Mode argument.

Symbol Value Meaning
MSBPRE 0 Data is MSB-first; sample bits before clock pulse
LSBPRE 1 Data is lsb-first; sample bits before clock pulse
MSBPOST 2 Data is MSB-first; sample bits after clock pulse
LSBPOST 3 Data is LSB-first; sample bits after clock pulse


Here is a simple example:

result  VAR     Byte

  SHIFTIN 0, 1, MSBPRE, [result]

Here, the SHIFTIN command will read I/O pin 0 (the Dpin) and will generate a clock signal on I/O 1 (the Cpin). The data that arrives on the Dpin depends on the device connected to it. Let's say, for example, that a shift register is connected and has a value of $AF (10101111) waiting to be sent. Additionally, let's assume that the shift register sends out the most significant bit first, and the first bit is on the Dpin before the first clock pulse (MSBPRE). The SHIFTIN command above will generate eight clock pulses and sample the data pin (Dpin) eight times. Afterward, the result variable will contain the value $AF.

By default, SHIFTIN acquires eight bits, but you can set it to shift any number of bits from 1 to 16 with the Bits argument. For example:

result  VAR     Byte

  SHIFTIN 0, 1, MSBPRE, [result\4]

Will only input the first 4 bits. In the example discussed above, the result variable will be left with %1010.

Some devices return more than 16 bits. For example, most 8-bit shift registers can be daisy-chained together to form any multiple of 8 bits; 16, 24, 32, 40... To solve this, you can use a single SHIFTIN instruction with multiple variables. Each variable can be assigned a particular number of bits with the Bits argument. As in:

dataLo  VAR     Word
dataHi  VAR     Byte

  SHIFTIN 0, 1, MSBPRE, [dataHi\4, dataLo\16]

The code above will first shift in four bits into dataHi and then 16 bits into dataLo. The two variables together make up a 20 bit value.

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