
Download the Propeller 2 Preliminary Feature List (.pdf)
This page and associated .pdf were last updated: October 22, 2010
Discussion Forums thread on the subject.
Note (1): Please keep in mind that these features are planned; implementation within the final product is dependent on layout and other constraints.
Note (2): Main memory RAM size may change due to layout constraints.
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General:
- 32-bit, general purpose multi-core microcontroller
- 8 identical processors (cogs)
- Planned 128-pin SMT package(1)
Clock Speed:
- 160 MHz planned maximum clock speed(1)
- Internal RC: 20 kHz or 20 MHz (cannot use PLL)
- External oscillator: DC to 160 MHz (without PLL) or 10 MHz to 32 MHz (with PLL) for system clock speed of 160 MHz maximum(1)
- PLL modes: 2x, 4x, 8x, 16x input clock multiplier
Performance Metrics:
- 4-stage pipeline
- Most instructions are single cycle
- 1.28 BIPS (160 MIPS x 8 cogs) maximum instruction execution rate(1); assumes that all cogs are running, their pipelines are always full, and only single-cycle instructions are being executed
Memory:
- Main memory: 128 KB RAM(2) + 32 KB ROM planned
- Cog memory: 2 KB (512 longs) cog RAM
- Optional external 32-bit addressable SDRAM for run-time data workspace; code space is not extendable
- Non-volatile application and data storage via external SPI EEPROM or SD card
- Cogs can access Main Memory at each hub access window in units of 1 byte, 1 word, 1 long, or 4 contiguous quad-aligned longs.
- Hub access window arrives for each cog in a round-robin fashion every 8 cycles.
Power Specifications:
- Core voltage: 1.8 VDC
- I/O pin voltage: 1.8 VDC–3.3 VDC
- Current source or sink per I/O: 40 mA
- Total current draw @ 1.8 VDC Core, 3.3 VDC I/O, 25° C: TBD
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I/O:
- 92 I/O pins total: 84 fully general purpose I/O + 8 additional general purpose I/O available after boot-up
- Each I/O pin is planned(1) to have internal:
- Input ADC
- Output DAC
- True or inverted input/output
- Differential input/output
- Comparator
- Schmitt input
Counter Modules:
- 2 counter modules, each with 2 integrated waveform generators, per cog
Math:
- Hardware multiplier and divider
- Hardware CORDIC system
Video Generation:
- Each cog has independent video generation hardware capable of VGA, Standard PAL/NTSC, and HD up to 1080p (at 30 Hz).
Code Protection and Encryption:
- Propeller application and data optionally encrypted in non-volatile storage
Supported Languages:
- Propeller 2 Spin and Propeller 2 Assembly
- Propeller 2 Assembly is not fully backwards compatible with Propeller 1 Assembly
- Some Propeller 1 Spin code may need to be ported to the Propeller 2
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